Changelog — 2016

Main page

• 2016-12-23:

  • updates to Base64 decoding with SIMD instructions — added a slightly shorter pshufb-based lookup

• 2016-12-22:

  • updates to SIMD-friendly algorithms for substring searching — results from Bulldozer CPU
  • new article AVX512 — first bit set in a large array

• 2016-12-21:

  • updates to Base64 encoding & decoding using AVX512BW instructions — use order of fields imposed by the base64 standard
  • Base64 encoding with SIMD instructions — added description of pack and lookup procedures using XOP instructions
  • new article SWAR check if all chars are digits

• 2016-12-18:

  • updates to Base64 encoding with SIMD instructions, Base64 decoding with SIMD instructions and AVX512F base64 coding and decoding — use order of fields imposed by the base64 standard

• 2016-12-16:

  • new article: Population count using XOP instructions — use instruction VPTERNB from AMD XOP can help a little

• 2016-12-04:

  • updates to Base64 decoding with SIMD instructions — refreshed measurments, added results from AMD Bulldozer
  • updates to Base64 encoding with SIMD instructions — added results from AMD Bulldozer

• 2016-12-01:

  • updates to Base64 decoding with SIMD instructions — I spotted an unnecessary instruction

• 2016-11-28:

  • new article: SIMD-friendly algorithms for substring searching

• 2016-11-27:

  • Paper by Daniel Lemire, Nathan Kurz and me: Faster Population Counts using AVX2 Instructions

• 2016-11-21:

  • updates to Base64 encoding & decoding using AVX512BW instructions — faster unpacking

• 2016-11-20:

  • updates to Conversion numbers to binary representation — a new clever SWAR procedure, by Larry Bank

• 2016-11-07:

  • updates to: AVX512: ternary functions evaluation — more about bit-select

• 2016-10-23:

  • new note: What does conflict detection do? — that's the question

• 2016-10-16:

  • new note: Detecting bit patterns with series of zeros followed by ones — a bit-twiddling hack
  • new note: Byte-wise alignr in AVX512F — an operation I needed

• 2016-10-08:

  • new note: GNU std::string::find is very slow — it's indeed very slow and now we know why.
  • new article: Sorting an AVX512 register — Vectorized sorting of AVX512 register (or its portion, or more registers)

• 2016-09-17:

  • new article: AVX512F base64 coding and decoding — AVX512 Foundation has got some limitation, but the speed-up over AVX2 code is about 2 times.

• 2016-09-14:

  • new article: Building a bitmask — a few solutions to a real-world problem (SIMD & SWAR)
  • new article: SIMD bit mask — fill a SIMD register starting from k-th bit

• 2016-09-07:

  • updates to: Snippets — fixed paddb implementation, Petr Kobalíček spotted the error (thanks!)

• 2016-09-04:

  • updates to: AVX512: ternary functions evaluation — some examples emerged from the real world

• 2016-09-02:

  • updates to: Base64 encoding with SIMD instructions — another lookup method, based on pshufb — this time a single pshufb is used!

• 2016-05-03:

  • updates to: SIMD-ized searching in unique constant dictionary — two new binary search modifications
  • updates to: SSSE3: PMADDUBSW and image crossfading — important fix thanks to Dmitry Petrov, SWAR algorithm, another SSE variants, results from Westmere (Core i5) and Skylake (Core i7)

• 2016-04-03:

  • new aricle: Base64 encoding & decoding using AVX512BW instructions — will AVX512BW help?

• 2016-04-01:

  • updates to: Base64 encoding with SIMD instructions — new lookup method, based on pshufb

• 2016-03-30:

  • updates to: Base64 decoding with SIMD instructions — new vector lookup algorithm (based on pshufb) boosts decoding by 10%.

• 2016-03-26:

  • updates to: AVX512: ternary functions evaluation — added a real-world example

• 2016-03-19:

  • updates to: Base64 decoding with SIMD instructions — better packing methods made AVX2 code faster (speedup over scalar version has raised from 2.10 to 2.40)

• 2016-03-17:

  • updates to: Base64 encoding with SIMD instructions — new method to split indices, text reorganization, refreshed results from Westmere, Haswell & Skylake

• 2016-03-16:

  • updates to: SSSE3: fast popcount — more detailed tests. AVX2 is definitively faster for larger data.

• 2016-03-13:

  • updates to: Base64 decoding with SIMD instructions — two new approaches to SIMD lookup
  • new article: Implementing byte-wise lookup table with PSHUFB — one of the methods, can be used in any context
  • updates to: SSSE3: fast popcount — fresh experiment results from Core i5 and Core i7, including AVX2 implementation. AVX2 code is faster than dedicated instruction.

• 2016-03-11:

  • updates to: Base64 encoding with SIMD instructions — AVX2 code is 3.5 times faster than scalar version (timing from Core i7 (Skylake)).

• 2016-03-10:

  • updates to: Base64 decoding with SIMD instructions — AVX2 code is 2.1 times faster than a scalar version (timing from Core i7 (Skylake)).

• 2016-03-07:

  • updates to: SSSE3: printing hex values — timing from Core i5 (Westmere)
  • updates to: Conversion numbers to hexadecimal representation — timing from Core i5 (Westmere)
  • updates to: Rozmycie obrazów (Image bluring) — timing from Core i5 (Westmere)

• 2016-03-06:

  • updates to: 16bpp/15bpp to 32bpp pixel conversions — timing from Core i5 (Westmere)

• 2016-03-04:

  • updates to: SSE: modify 32bpp images with lookup tables — link to github

• 2016-03-03:

  • updates to: SSSE3/SSE4: alpha blending — operator over — timing from Core i5 (Westmere)

• 2016-03-02:

  • updates to: SSSE3: PMADDUBSW and image crossfading — timing from Core i5 (Westmere)

• 2016-01-18:

  • updates to: Base64 decoding with SIMD instructions — timing from Core i7 (Haswell).

• 2016-01-17:

  • new article: Base64 decoding with SIMD instructions — SSE code could by more than 2 times faster than lookup-based scalar code.
  • updates to: SIMD-friendly Rabin-Karp modification — results for 64-bit code.
  • updates to: Base64 encoding — implementation study — results from Core i5, including (shocking) results for BMI2 instructions and usage of 64-bit registers.

• 2016-01-12:

  • new article: Base64 encoding with SIMD instructions — SSE code could by more than 2 times faster than lookup-based scalar code.

• 2016-01-06:

  • new article: Speeding up letter case conversion — SWAR swap case could be 3 times faster than scalar version for English texts

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