Not everything in AVX2 is 256-bit

Author:Wojciech Muła
Added on:2015-03-21

AVX2 has added support for 256-bit arguments for many operations on packed integers, although not all. Some instructions accept the 256-bit registers, but operates on 128-bit lanes rather the whole register.

There are three major groups of instructions:

Below is a full list of instructions (with intrinsics):

For me the most surprising are packing instructions (vpack*) as they require additional shuffling (after or before the instruction) if we want to keep the order of values. In some cases the order is crucial.