| Author: | Wojciech Muła |
|---|---|
| Added on: | 2008-06-08 |
RDTSC is incremented with bus-clock cycles, and then multiplied by core-clock/bus-clock ratio. From programmer view, RDTSC counter is incremented by value greater then 1, for example on C2D E8200 it is 8.
Latency of RDTSC in Pentium4 is about 60-120 cycles, on AMD CPU around 6 cycles.